秋天的第一份offer在这里!
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近日“秋天的第一杯奶茶”引发热议。
其实,
喝不喝秋天的第一杯奶茶不重要
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再不努力工作的话
一定能喝上冬天的第一口西北风。
于是贴心的小编在此,
为你献上恩智浦近期热招职位汇总。
看看有没有你的心仪职位?
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↓ 如果你适合如下职位 ↓
请将简历投递至:talent@nxp.com
邮件注明:姓名+申请职位+工作城市
SoC Design & Verification Engineer
Location: Tianjin
(上下滑动启阅)
Responsibility:
- Discuss with architect and market on project requirement/definition.
- Strive for innovation on system architecture, application, methodology.
- Anticipate in IP/SOC design & verification on MPU product.
- Work with DFT/Backend to support chip implementation.
- Work with validation/SW to support post-silicon debug work.
Requirement:
- Master degree or above, major in Electronic Engineering/Computer Science or other related discipline.
- Minimum 3 years’ working experience on ASIC design & verification.
- Deep understanding on digital logic circuit, a great plus on IP development experience.
- Good knowledge in ASIC SoC design flow and the requirement of each phases.
- Good language skill in English.
- Script language (Perl/TCL/Python) is a plus.
- Knowledge on architecture of micro-processer is a plus.
MCU Design Engineer
Location: Shanghai
(上下滑动启阅)
Responsibility:
- Carry out all MCU development activities in the field of digital design on own initiative.
- Generate RTL coding in Verilog and VHDL according specification and DFT requirement.
- Write synthesis scripts and perform the logic synthesis and timing analysis.
- Write test patterns and perform simulation and regression, and write block descriptions and verification and validation reports.
- Generate and debug test patterns for product test program development and help to do the debug.
- Work closely with bench validation and characterization team to support successful product release.
- Guarantee the technical deliverables of his jobs in terms of quality and performance.
- Communicate within a design team and within the whole development organization.
Requirement:
- Bachelor degree or above, major in Electronic Engineering/Computer Science or other related discipline.
- Minimum 5 years (7 years for BSEE) experience for digital design.
- Familiar with Cadence front-end design tools: NC-Sim, RTL Compiler, Conformal, etc.
- Familiar with ARM based CPU architecture and AMBA bus architecture, and microcontrollers programming and application.
- Able to establish good relationships with a multi-disciplinary development team, international customers and subcontractors.
- Creative thinker with helicopter view, capable of finding an appropriate solution to complex problems.
- Good communicator in both oral and written English.
- Team player, able to work in a cross-functional-team environment.
- Need to have good time management skills to balance multi-tasking workloads.
Principal System/Applications Engineer
Location: Shanghai
(上下滑动启阅)
Responsibility:
- Serve as technical owner for new product definition for analog and power management products for consumer/industrial applications. Author, review, and update detailed product specification document and validation test plan.
- Work closely with customers, internal team to define system requirement, feature set, product specifications, architecture which may include PMIC, battery charger, DC/DC converter, LDO, charge pump, LED driver, clocking, analog/digital interface, etc. for the proposed product.
- Communicate/present to external/internal audience regarding product specification, new product ideas.
- Understand power conversion topology, control loop design, power/thermal analysis, process and package technology, trade-off between system/design constrains, etc.
- Propose new products to drive the product roadmap ensuring the business will have a plan for sustainable differentiation in our products.
- Support new product development and key customers. Participate in chip architecture review, IC and board-level design reviews with internal engineering team.
- Assist product marketing with deriving market requirements, technical definition trade-offs and validating value propositions and competitive analysis.
- Travel to participate in internal functional team and customer meetings domestically and internationally, sometimes maybe on short notice.
Requirement:
- Bachelor degree or above, major in Electronic Engineering/Computer Science or other related discipline.
- Minimum 8 years’ relevant experience in system/applications, product definition, architect, application support and/or designing power manage products for consumer/industrial applications.
- Minimum 5 years’ hands-on experience on circuit testing and trouble shooting in lab environment.
- Extensive customer design-in support experience with power management product is preferred.
- Prior experience in PMIC, and/or Li-ion battery charger, etc. is plus.
- Good communication skill, able to explain system concepts and detailed technical requirements (writing and/or verbally) to internal teams and customers.
- Self-motivated, creative and results-oriented.
- Prior experience in collaborating and managing international customers is plus.
Hardware Crypto IP Designer
Location: Shanghai
(上下滑动启阅)
Responsibility:
- Design hardware architectures with regards to cryptographic & security aspects.
- Specify and secure implementation of hardware co-processors and new security features.
- Identify and anticipate new product focused security attacks before they become known in the public domain and find appropriate countermeasures in hardware.
- Drive innovation on way of working in secured hardware design, especially secure design flow and methodologies.
Requirement:
- Bachelor or master degree, major in Electronic Engineering, Computer Science or related disciplines.
- 3-5 years’ relevant working experience in multinational corporate with ASIC design experience.
- Experience with implementation of advanced cryptology algorithms and secure hardware architecture design an advantage.
- An understanding of security attacks (e.g. side channel, induced faults and counter measures)
- Experience with Synthesis tools, design flow, Verilog, Microcontrollers, ARM / RISCV cores, are all an advantage.
- IP verification & validation knowhow (SV Test benches, working in an UVM environment, etc.).
- Good communication skills and a pro-active attitude.
Senior Security Vulnerability Analyst
Location: Shanghai
(上下滑动启阅)
Responsibility:
- Execute and plan vulnerability analysis of high security embedded devices (Smart Cards, secure elements etc.) during product development.
- Execute and support vulnerability analysis activities in Common certifications of products (technical report review, follow-up investigation etc. with focus on hardware, crypto libraries, and operating systems).
- Support the various HW development teams of NXP with state-of-the-art security know-how and keep close contacts with all groups within NXP that take an interest in security (Research as well as BLs).
- Review of academic research and investigate new potential attack paths on high security smart cards and secure elements.
Requirement:
- Bachelor or master degree, major in Electronic Engineering, Computer Science or related disciplines.
- Minimum 3 years’ experience in the field of Embedded Security and proven expertise (publications, etc.) in Side-Channel Analysis of cryptography.
- Ideally with a background in smart card / semiconductor process technology, embedded security technologies, especially countermeasures in HW and SW, signal processing, advanced measurement techniques, cryptography.
- Have knowledge of 8051 / ARM based security products. C, JAVA, Python and ideally assembler language.
- Have experience with advanced CMOS HW designs and their underlying non-volatile and volatile technologies would be beneficial - in particular in the context of advanced side channel analysis techniques.
- Strong leadership skills with a proven ability to direct others and achieve set goals.
- Have ability to work independently without supervision is essential.
- Have a creative approach to problem solving with a focus on achieving objectives.
- Have direct experience of academic / industrial research (conferences, workshops, journals, etc.) including personal participation in such events.
- Have ability to interact smoothly with a diverse range of colleagues, customers and partners inside and outside of NXP.
SoC Security Hardware Architect
Location: Shanghai
(上下滑动启阅)
Responsibility:
- Specify innovative and disruptive security solutions and detailed implementation reviews (RTL, firmware code).
- Define security mechanisms in hardware, firmware, protocols, etc.
- Manage secure requirements by definition and link security mechanisms to functional requirements.
- Detailed attack modeling and security mechanism specification for hardware and software blocks.
- Advise and train the team on design, implementation and test of software security mechanisms.
- Analyze root cause of security defects.
- Technically interface to customers, evaluation labs and to the product development team.
- Support certification and technical interface with evaluator and certifier.
- Plan coordination and execution of pre-silicon vulnerability analysis (VA).
Requirement:
- Bachelor or master degree, major in Electronic Engineering, Computer Science or related disciplines.
- Have very good experience in design and development of Embedded Secure Systems.
- Very good knowledge of SoCs and/or Smartcard/Secure Element products.
- Familiar to work with “state of the art” CAD tools (e.g. Cadence, …).
- Have knowledge of Hardware description languages (System Verilog, VHDL).
- Have a strong security background.
- Be willing to listen, adapt and communicate.
- Be willing to travel.
APAC Application Engineer
Location: Beijing or Shanghai
(上下滑动启阅)
Responsibility:
- Day-to-day FAQ and troubleshooting for customers, including working with R&D to define and implement the HW and SW solutions for resolving customers’ issues.
- On-site support at customer sites to work with customers to resolve the most urgent issues.
- Performance benchmark and optimize.
- Develop demo and proof-of-concept software modules.
- Review technical specifications.
- Present new products and technologies and training to customers.
- Testing tools for specific customer development.
- Device driver development.
- Learn various protocol stacks for supporting customers.
- Work closely with sales, marketing and CAS team members to promote NXP EP product & corresponding vertical solutions to customers.
Requirement:
- Bachelor degree or above, major in Electronic Engineering/Computer Science or other related discipline.
- Minimum 3 to 5 years’ industrial experience in device driver development (e.g., high-speed IO with Network accelerators) or protocol stack implementation in embedded Linux or other RTOS.
- Familiar with any of the following multi-core processors, PowerPC, ARM, x86, and MIPS architectures (PowerPC and ARM are preferred)
- Knowledge of system architectures and performance issues especially for Networking, Router, Switch, Gateway, 5G Base station and small cell
- Solid background on real time embedded system, especially in the fields of I/O interfaces, bus architectures and TCP/IP networking protocols.
- Familiar with Linux operating system, and its device driver architecture.
- Strong knowledge in C/C++, Assembly language.
- Very Good problem solving and debugging skills
- Excellent interpersonal and communication skills, good team player and team leader is a plus.
- Good written and oral English skill.
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