【CHES 2024】Jan. 15@Halifax, Canada
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【CHES 2024】
Important dates
Volume 2024/3
Submission deadline: January 15, 2024
Rebuttal phase: February 19-23, 2024
Notification: March 15, 2024
Final version due: April 14, 2024
Conference: September 4-7, 2024
CCF: B
Topics of interest include but are not limited to
Cryptographic implementations:
Hardware architectures
Cryptographic processors and coprocessors
True and pseudorandom number generators
Physical unclonable functions (PUFs)
Efficient software implementation
SHARCS (Special-purpose HARdware for Cryptanalysis, quantum included)
Attacks against implementations, and countermeasures:
Remote, micro-architectural and physical side-channel attacks and countermeasures
Fault attacks and countermeasures
Hardware tampering and tamper-resistance
White-box cryptography and code obfuscation
Reverse engineering of hardware/software
Tools and methodologies:
Formal methods, techniques and tools for secure design and verification for hardware/software
Computer aided cryptographic engineering
Domain-specific languages for cryptographic systems
Metrics for the security of embedded systems
FPGA design security
Interactions between cryptographic theory and implementation issues:
Quantum cryptanalysis
Algorithm subversion and subversion prevention
New and emerging cryptographic algorithms and protocols targeting embedded devices
Theoretical hardware models that allow proofs
Applications:
RISC-V security
Trusted execution environments and trusted computing platforms
IP protection for hardware/software and technologies for anti-counterfeiting
Reconfigurable hardware for cryptography
Secure elements, security subsystems, and applications
Security for the Internet of Things and cyberphysical systems (RFID, sensor networks, smart meters, medical implants, smart devices for home automation, industrial control, automotive, etc.)
Secure storage devices (memories, disks, etc.)
Isolation and monitoring hardware for cyberresilience
Engineering of zero-knowledge proof systems
Privacy-preserving computing in practice (MPC, FHE)
Having been established in 1999, the Cryptographic Hardware and Embedded Systems (CHES) conference is the premier venue for research on both design and analysis of cryptographic hardware and software implementations. As an area conference of the International Association for Cryptologic Research (IACR), CHES bridges the cryptographic research and engineering communities, and attracts participants from academia, industry, government and beyond. CHES 2024 will take place in Halifax, Canada in September 4-7, 2024.
General Co-Chairs
Colin O’Flynn, NewAE and Dalhousie University, Canada
Hilary Taylor, NewAE and Dalhousie University, Canada
Program Co-Chairs
Bo-Yin Yang, Academia Sinica, Taiwan
Francisco Rodriguez, Technology Innovation Institute, United Arab Emirates
Program Committee
Anita Aghaie, Siemens
Gustavo Banegas, Qualcomm
Lejla Batina, Radboud University
Sonia Belaïd, CryptoExperts
Sebastian Berndt, University of Lübeck
Jean-Luc Beuchat, UAS at HES-SO Valais-Wallis
Shivam Bhasin, Nanyang Technological University
Begül Bilgin, Rambus
Ileana Buhan, Radboud University
Eleonora Cagli, CEA-Leti University Grenoble-Alpes
Fabio Campos, Max Planck Institute (SP)
Jiun-Peng Chen, Academia Sinica
Chen-Mou Cheng, BTQ
Jesús-Javier Chi-Domínguez, Technology Innovation Institute
Lukasz Chmielewski, Masaryk University
Marios Omar Choudary, University Politehnica of Bucharest
Chitchanok Chuengsatiansup, University of Melbourne
Jan-Pieter D'Anvers, KU Leuven
Christoph Dobraunig, Intel Labs
Cécile Dumas, CEA-Leti University Grenoble-Alpes
Fatemeh Ganji, Worcester Polytechnic Institute
Daniel Genkin, University of Pennsylvania
Benedikt Gierlichs, KU Leuven
Aron Gohr, Independent Researcher
François Gérard, University of Luxembourg
Julius Hermelink, Max Planck Institute (SP)
Johann Heyszl, Google
Kathrin Hövelmanns, TU Eindhoven
Michael Hutter, PQShield
Kimmo Järvinen, Xiphera
Matthias J. Kannwischer, Chelpis
Tanja Lange, TU Eindhoven
Leibo Liu, Tsinghua University
Patrick Longa, Microsoft Research
Roel Maes, Intrinsic ID
Cuauhtemoc Mancillas-Lopez, CINVESTAV
Stefan Mangard, TU Graz
Loïc Masure, UC Louvain
Thorben Moos, UC Louvain
Amir Moradi, Ruhr University Bochum
Elke De Mulder, Google
Pierrick Méaux, University of Luxembourg
Ruben Niederhagen, Academia Sinica & University of Southern Denmark
Svetla Nikova, KU Leuven
Colin O'Flynn, NewAE Technology Inc.
Tiago Oliveira, Max Planck Institute (SP)
Guilherme Perin, Leiden University
Peter Pessl, Infineon
Romain Poussier, ANSSI
Maria Méndez Real, Polytech Nantes University
Christian Rechberger, TU Graz
Francesco Regazzoni, University of Amsterdam & Università della Svizzera italiana
Joost Renes, NXP Semiconductors
Oscar Reparaz, Cash App @ Block Inc
Chester Rebeiro, IIT Madras
Thomas Roche, NinjaLab
Francisco Rodríguez-Henríquez, Technology Innovation Institute
Raghvendra Singh Rohit, Technology Innovation Institute
Mélissa Rossi, ANSSI
Sujoy Sinha Roy, TU Graz
Markku-Juhani O. Saarinen, PQShield Ltd.
Erkay Savas, Sabanci University
Georg Sigl, TU Munich & Fraunhofer AISEC
Petr Svenda, Masaryk University
Shahin Tajik, Worcester Polytechnic Institute
Junko Takahashi, NTT
Nicolas Thériault, Universidad de Santiago de Chile
Ming-Hsien Tsai, National Applied Research Labs (TW)
Rei Ueno, Tohoku University
Alexandre Venelli, NXP Semiconductors
Bo-Yin Yang, Academia Sinica
Yuval Yarom, Ruhr University Bochum
Kota Yoshida, Ritsumeikan University
Yu Yu, Shanghai Jiao Tong University
Fan Zhang, Zhejiang University