HiPChips Chiplet Workshop @ ISCA 2022会议资料
在不久前分享的《2021 OCP Global Summit会议资料下载分享》中，我就曾整理出一个Chiplet分类目录，今天的资料更多点。
本文分享的资料，来自“HiPChips Chiplet Workshop @ ISCA Conference”技术会议，其中“HiPChips” 和 “ISCA”分别是High Performance Chiplet and Interconnect Architectures（高性能Chiplet小芯片及互连架构）、International Symposium on Computer Architecture（计算机体系结构国际研讨会）的缩写。
pdf演讲稿打包下载
https://pan.baidu.com/s/1U7Xc3OHRaFSEk42oEx5nGQ?pwd=nwoj
提取码：nwoj
资料来源 https://www.opencompute.org/summit/ocp-at-the-isca-conference/slides（这次只有一段课程的视频下载，没有yutobe那些了）
Intel和AMD看上去没讲啥新东西，反而是NVIDIA分享的《High-Bandwidth Density, Energy-Efficient, Short-Reach Signaling that Enables Massively Scalable Parallelism》，里面有些未来的东西，我从中只截选了下面几张图。
1个2x2的GPU阵列，应该就是NVIDIA未来的Chiplet，在GPU Die之间可达数TB/s的带宽。把4颗这样的MCM-GPU封装芯片放在一块电路板上，就是未来的DGX模块吧？总共包含有16个GPU Die。
无论是在GPU Packgae封装上，还是走在PCB板上的GPU封装间互连，应该用的都是GRS Links。那为什么下图中写着：由8条Data lane组成的 Off-Package带宽，只有25GB/s呢？
大家留意到了吗？这个Die间距只有大约1mm，超短线能降低片上互连热损耗，应该可以提高带宽吧。
以下是我简单整理的演讲题目（官网是按时间顺序而不是按分类），可以看出主要的2大类话题：Chiplet Design & Architecure、Standards and ECO；软件和I/O这块相对还少一些。由于文档总数不多，我在pdf下载里反而没分目录。
Track分类 | Title题目 | Speaker(Company) |
Opening Remarks | HipChips Program Committee: Dharmesh Jani (Meta) | |
Keynote | The Case for a Universal Chiplet Revolution | Cliff Young (Google Rohit Mittal (Google) |
Chiplet’s March to the 3D V-Cache™ and Beyond | Dr. John Wuu (AMD) Raja Swaminathan (AMD) | |
Chiplet Design & Architecure设计和架构 | Chiplet-based Waferscale Computing | Dr. Rakesh Kumar (UIUC) |
HPC/AI system opportunity with integrated photonics chiplets |
| |
Heterogeneous Chiplet-based Architecture for In-Memory Acceleration of DNNs | Gokul Krishnan (ASU) Kevin Cao (ASU) | |
Dual-Stripline Configuration for Efficient Signal Routing in the Bunch-of-Wires (BOW) Interface | Shalabh Gupta (IIT Bombay) | |
Configurable IO Chiplet Architecture | Rishi Chugh (Cadence) | |
Hyperscaler use cases and challnges for hetergeneous integration | Ravi Agarwal (Meta) Dharmesh Jani (Meta) | |
Glass Interposer Integration of Logic and Memory Chiplets: PPA and Power/Signal Integrity Benefits | Sung-Kyu Lim (GATech) Ravi Agarwal (Meta) | |
Designing and Pathfinding Scale-out Chiplet Based Systems |
| |
Using In-Chip Monitoring and Deep Data Analytics for High Bandwidth Die-to-Die Characterization | Alex Burlak (proteanTecs) | |
High-Bandwidth Density, Energy-Efficient, Short-Reach Signaling that Enables Massively Scalable Parallelism | John Wilson (NVidia) | |
The Road to Data Center Power Efficiency | Tawfik Arabi (AMD) Anshuman Mittal (AMD) | |
Standards and ECO标准和生态 | OCP Open Domain Specific Architecture(ODSA): Approach to Creating Open Chiplet Ecosystem under OCP | OCP ODSA Leads: Bapi Vinnikota (BRCM) Dharmesh Jani (Meta) |
OCP Open Domain Specific Architecture (ODSA)'s Bunch of Wire (BoW) Interface for Die to Die Applications | OCP ODSA Leads: Bapi Vinnikota (BRCM) Elad Alon(BCA) Jayaprakash B. (Cisco) | |
Redefining Computing Architecture Boundaries with Off-Package Chiplets - An Energy Centric Computing Perspective | Allan Cantle (Nallasway) | |
What is the right Die-to-Die Interface? A Comparison Study | Shahab Ardalan Bapi Vinnikota (BRCM) Tawfik Arabi (AMD) Elad Alon (BCA) | |
Chiplets and Sustainability |
Carole Jean Wu (Meta) | |
Cost-Aware Exploration for Chiplet-Based Architecture with Advanced Packaging Technologies | Tianqi Tang (UCSB) Yuan Xie (UCSB) | |
SW for Chiplets | HALO: a compiler framework for heterogeneous chiplet architectures with near-zero interconnect latencies | Weiming Zhao (Alibaba) Weifeng Zhang (Alibaba) |
Software-defined Design for Systems of Chiplets | Duncan Haldane (JTIX) | |
Chiplet IO | Design Space for Chiplet IO | Ken Chang (Cadence) |
Closing Remarks | HipChips Program Committee: Weifeng Zhang (Alibaba) |
希望对大家有帮助。
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